Data storage systems and methods which utilize an on-board cache
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United States of America Patent
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Jun 15, 2004
Grant Date -
Jun 27, 2002
app pub date -
Dec 27, 2000
filing date -
Dec 27, 2000
priority date (Note) -
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Abstract
The invention is directed to data storage and retrieval techniques that utilize a cache which is preferred to a consumer of a data element stored within that cache. Since the cache is preferred to the consumer, the consumer has less contention for access to the preferred cache vis-a-vis a cache of a conventional data storage system implementation which is typically equally shared throughout the data storage system. Preferably, the preferred cache is on the same circuit board as the consumer so that memory accesses are on the order of a few hundred nanoseconds, rather than several microseconds when the cache and the consumer are on different circuit boards as in a conventional data storage implementation. One arrangement of the invention is directed to a data storage system having a first circuit board, a second circuit board and a connection mechanism that connects the first and second circuit boards together. The first circuit board includes (i) a front-end interface circuit for connecting to an external host, (ii) an on-board cache, and (iii) an on-board switch having a first port that connects to the front-end interface circuit, a second port that connects to the on-board cache, and a third port that connects to the connection mechanism. The second circuit board has a back-end interface circuit for connecting to a storage device. When the front-end interface circuit retrieves (on behalf of a host) a data element (e.g., a block of data) from the storage device through the on-board switch of the first circuit board, the connection mechanism and the back-end interface circuit of the second circuit board, the on-board cache of the first circuit board can retain a copy of the data element for quick access in the future. By configuring the on-board cache to be preferred to the front-end interface circuit and because both the on-board cache and the front-end interface circuit reside on the first circuit board, when the front-end interface circuit accesses the copy of the data element in the on-board cache, there will be less contention and latency compared to that for a highly shared cache of a conventional data storage system implementation.
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- 15 United States
- 10 France
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- 2 Other
Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| EMC IP HOLDING COMPANY LLC | 176 SOUTH STREET HOPKINTON MA 01748 |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Chilton, Kendell A | Southborough, MA | 25 | 581 |
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Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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