Importance

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Abstract

A method and apparatus for synchronizing clocks is provided that is flexible and compensates for process, voltage, and temperature (PVT) variations and other timing differences between two devices. The present invention includes producing an up-converted clock from a system clock, the up-converted clock having a frequency that is a multiple of the frequency of the system clock, producing an aligned clock from a data-aligned clock from a first device and a counter clock from a second device, producing a de-jittered clock, selecting a first reference clock to send to the first device from the up-converted clock, the aligned clock and the de-jittered clock, and selecting a second reference clock to send to the second device from the up-converted clock, the aligned clock and the de-jittered clock.

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First Claim