Bus system for a highly scalable multiprocessor system and method for transmitting information in the bus system
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United States of America Patent
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Jun 29, 2004
Grant Date -
N/A
app pub date -
Nov 24, 1999
filing date -
Nov 24, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The invention relates to a bus for a highly scalable multiprocessor system, to a redundant bus system that utilizes this bus, and to a method for transmitting information in this bus system. To guarantee an optimally high throughput of individual accesses onto a shared memory, the bus 3 consists of an address bus 4 and a data bus 5, which are operated logically independent of one another and which are functionally connected only via a common identifier. In this way, the dynamic holding of the address bus 4 and of the data bus 5 as well as the latencies are minimized.
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