Explicitly clustered register file and execution unit architecture
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United States of America Patent
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Jun 29, 2004
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N/A
app pub date -
Aug 18, 2000
filing date -
Aug 18, 2000
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Abstract
A processor comprising a new architectural feature called a Register Domain, where a Register Domain has a register file, at least one execution unit, and coupling circuitry between the two. A processor will typically have a plurality of Register Domains, and Register Domains may have different types of execution units within them. Individual Register Domains will be visible to a user.
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