Method of writing ferroelectric field effect transistor
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United States of America Patent
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Jul 6, 2004
Grant Date -
N/A
app pub date -
May 1, 2002
filing date -
May 1, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A ferroelectric field effect transistor (FET) has a gate, source, drain, and substrate. A negative voltage is applied to the gate. Ground potential is applied to the source, drain, and substrate. The negative voltage has a magnitude at least equal to the coercive voltage of the FET. A positive voltage is then applied to the gate. Ground potential is applied to the source and substrate. The positive voltage is no less than the coercive voltage. Either a positive voltage or a ground potential is applied to the drain to write a logic state to the FET. A voltage is applied to the gate. Ground potential is applied to the source. A positive voltage is applied to the drain. The drain current is measured and compared to a compare current. The relative size of the drain current compared to the compare current is indicative of the stored logic state in the FET.
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