Semiconductor package, method of manufacturing the same, and semiconductor device
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United States of America Patent
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Jul 20, 2004
Grant Date -
Mar 13, 2003
app pub date -
Aug 22, 2002
filing date -
Aug 24, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A wiring layer for serving as a first electrode layer of a capacitor portion patterned in a predetermined shape on an insulative base member is formed. A resin layer for serving as a dielectric layer of the capacitor portion is formed on a surface of the wiring layer using an electrophoretic process. Another wiring layer for serving as a second electrode layer of the capacitor portion patterned in a predetermined shape by patterning on the insulative base member inclusive of the resin layer is formed.
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