Inter-chip port and method for supporting high rate data streams in SDH and SONET transport networks
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United States of America Patent
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Jul 20, 2004
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app pub date -
Aug 15, 2000
filing date -
Aug 18, 1999
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Abstract
A method and an inter-chip communication port for supporting a concatenated type of a high order SDH/SONET signal, with processing Transport Overhead bytes (TOH) and Path Overhead bytes (POH) thereof, in a structure which comprises a group of chips, wherein each of the chips is capable of supporting a lower order SDH/SONET signal with processing its TOH and POH, while one of them named a master chip is operative to coordinate operation of the remaining chips named slaves so as to cause them working in accord as one unit.
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