Parallel programming of programmable logic using register chains
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United States of America Patent
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Jul 20, 2004
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N/A
app pub date -
Mar 25, 2002
filing date -
Mar 25, 2002
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Abstract
Techniques and circuitry are used to more rapidly configuring programmable integrated circuits. Configuration data is input into a programmable integrated circuit in parallel via parallel inputs (705), and this data is also handled internally in parallel. The configuration data will be stored in a data register (722). This data register includes two or more serial register chains, each chain being made up of a serial chain of registers. The configuration data is input into the two of more chains of the data registers in parallel. Circuitry is also provided to handle redundancy.
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