High performance capacitor

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United States of America Patent

PATENT NO 6770969
SERIAL NO

10075659

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A capacitor includes a controlled collapse chip connection system coupled by vias to a plurality of conductive layers embedded in a dielectric. The capacitor and a die can each be mounted on opposite surfaces of a substrate using a controlled collapse chip connection. The controlled collapse chip connection provides a large number of leads for coupling to the conductive layers of the capacitor. The large number of leads reduce the inductance in the connection. For a thin substrate, the length of the conductive material connecting the capacitor to the die is short, and the inductance and resistance of the conductive material is low. A system comprising two dies can be fabricated in a small volume using a plurality of substrates and a single controlled collapse chip connection compatible capacitor for decoupling the two dies.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mosley, Larry Eugene Sunnyvale, CA 8 276

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