EEPROM writing method
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United States of America Patent
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Aug 3, 2004
Grant Date -
Apr 29, 2004
app pub date -
Dec 8, 2003
filing date -
Sep 14, 1990
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An electrically erasable programmable read-only memory receives a single supply voltage and generates a first voltage higher than both the supply voltage and the ground voltage, a second voltage lower than both the supply voltage and the ground voltage. Each memory cell in the memory has a nonvolatile storage transistor with a floating gate. To erase the memory cell, the first voltage is applied on a first side of the floating gate and the second voltage is on a second, opposite side of the floating gate. To program the memory cell, the second voltage is applied on the first side of the floating gate, and the first voltage is applied on the second side of the floating gate.
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