Stereolithographic method and apparatus for fabricating spacers for semiconductor devices and resulting structures

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6773957
SERIAL NO

10246318

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Insulative spacers to be disposed on a surface of a semiconductor device component and methods of fabricating and placing the insulative spacers on semiconductor device components. Upon assembly of the semiconductor device component face-down upon a higher level substrate and establishing electrical communication between the semiconductor device component and the higher level substrate, the insulative spacers define a minimum, substantially uniform distance between the semiconductor device component and the higher level substrate. The insulative spacers also prevent tilting or tipping of the semiconductor device component relative to the higher level substrate. The insulative spacers may be preformed or fabricated on a surface of the semiconductor device component. A stereolithographic method for fabricating the insulative spacers is disclosed, which may employ a machine vision system to recognize the position and orientation of a substrate to which material is to be applied and control fabrication based upon the recognized position and orientation.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT100 WALL STREET SUITE 1600 NEW YORK NY 10005

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Farnworth, Warren M Nampa, ID 855 33798
Wood, Alan G Boise, ID 415 23368

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation