Semiconductor structure having alignment marks with shallow trench isolation
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United States of America Patent
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Aug 10, 2004
Grant Date -
N/A
app pub date -
Dec 17, 2002
filing date -
Dec 17, 2002
priority date (Note) -
Expired
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Abstract
A semiconductor structure including a semiconductor substrate, an isolation trench in the semiconductor substrate, and an alignment trench in the semiconductor substrate is disclosed. The structure also includes a dielectric layer and a metallic layer. The dielectric layer is on the semiconductor substrate and in both the isolation trench and the alignment trench. The dielectric layer fills the isolation trench and does not fill the alignment trench. The metallic layer is on the dielectric layer.
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