Memory architecture for micromirror cell

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6775174
APP PUB NO 20020085437A1
SERIAL NO

10034896

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Abstract

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A one transistor one capacitor micromirror with DRAM memory cell built around a large polysilicon-to-substrate capacitor which is not susceptible to recombination of photo-generated carriers caused by illumination in the projector. This large polysilicon-to-substrate capacitor overshadows the much smaller inherent parallel depletion capacitance which is sensitive to light. The device is further 100% shielded from exposed light by metal layers and the address node is located under the center of the micromirror mirror to obtain maximum shielding of light for the smaller, light sensitive, depletion portion of the capacitance. As a result the micromirror of this invention can adequately hold the cell charge in excess of the device load time of 300 .mu.Sec even in extremely high brightness projector applications. This invention also provides a feature which automatically forces micromirror mirrors located over bad CMOS memory cell to the dark state, which is much less objectionable in most applications, thereby improving the overall effective processing yield.

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCORPORATED12500 TI BOULEVARD MS 3999 DALLAS TX 75243

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hornbeck, Larry J Van Alstyne, TX 35 12515
Huffman, James D Richardson, TX 54 1986
Knipe, Richard L McKinney, TX 55 1559

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