High-speed communication system with a feedback synchronization loop
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United States of America Patent
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Aug 10, 2004
Grant Date -
N/A
app pub date -
Aug 11, 1999
filing date -
Aug 11, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In a communications device having a physical layer device and a processing device connected to the physical layer device, the number of input/output (I/O) ports required for communication between the devices in the gigabit range is substantially reduced by utilizing millivolt differential I/O drivers and receivers. In addition, a calibration feedback loop synchronizes the data and clock signals on the processing device, thereby eliminating the need to recover the clock on the processing device.
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