Metal-programmable single-port SRAM array for dual-port functionality
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United States of America Patent
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Aug 17, 2004
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N/A
app pub date -
May 8, 2003
filing date -
May 8, 2003
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Abstract
The present invention provides a method and apparatus for providing dual-port capability to an SRAM array. The internal nodes of two single-port memory cells are connected to each other through metal-layer programming to form a dual-port memory cell. In a preferred embodiment, a split word line design is used for each single-port memory cell, to facilitate dual-port memory access while minimizing the need for IC layout space. An additional benefit of the present invention is that it allows 'slices' of a memory array to be converted into dual-port memory, so as to allow both single-port and dual-port memory cells in the same memory array.
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