Methods for providing void-free layers for semiconductor assemblies

United States of America Patent

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Aug 24, 2004
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Jul 18, 2002
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Mar 13, 2002
filing date
Mar 7, 1996

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Abstract

A method of providing a substantially void free layer for one or more flip chip assemblies, or one or more microelectronic components, utilizing a curable encapsulant. Also disclosed is a method of injecting an encapsulant into an assembly and a method of treating a microelectronic component to form a void free layer.

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TESSERA INC	3025 ORCHARD PARKWAY SAN JOSE CA 95134

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H01L:SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICE....

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Inventor Name	Address	# of filed Patents	Total Citations
Distefano, Thomas H	Monte Sereno, CA	191	14662
Fjelstad, Joseph	Sunnyvale, CA	130	7144

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Methods for providing void-free layers for semiconductor assemblies

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United States of America Patent

10097032

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PATENT NO	6780747
APP PUB NO	20020094671A1
SERIAL NO	10097032
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
August 24, 2004	US,6780747,B2 US6780747B2	GRANTED PATENT AS SECOND PUBLICATION
July 18, 2002	US,20020094671,A1 US20020094671A1	FIRST PUBLISHED PATENT APPLICATION

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10097032

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