High voltage row and column driver for programmable resistance memory
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United States of America Patent
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-
Aug 24, 2004
Grant Date -
Nov 6, 2003
app pub date -
May 1, 2002
filing date -
May 1, 2002
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A driver circuit having one or more MOS transistors. The driver circuit is capable of providing an output voltage greater than the power supply voltage; however, the magnitude of the voltages appearing across the terminals of the MOS transistors are preferably less than or equal to the magnitude of the power supply voltage. The driver circuit may comprise a plurality of serially coupled PMOS transistors and a plurality of serially coupled NMOS transistors wherein the plurality of PMOS transistors and plurality of NMOS transistors are coupled at the output node of the driver.
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