Integrated volatile and non-volatile memory
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 24, 2004
Issued Date -
N/A
app pub date -
May 20, 2003
filing date -
Aug 31, 2000
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A memory device having a first and a second memory section, the first and the second memory sections being coupled to bit lines. The second memory section may include at least one fuse. The first memory section includes a volatile memory and the second memory section includes a non-volatile memory. The volatile memory may be static or dynamic random access memory. The memory device may further include a control circuit connected to the at least one fuse to provide for prelaser testing.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully