Solid-state imaging device and method for controlling same

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United States of America Patent

PATENT NO 6784933
SERIAL NO

09653190

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Abstract

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A pixel unit 1 comprises a nonvolatile memory transistor MT, which is formed on a p-type well 12 of a semiconductor substrate 10 and which has a floating gate 14 and a control gate 16, and selecting gate transistors ST1 and ST2 which share a diffusion layer 17 with the memory transistor MT and which is formed on both sides of the memory transistor MT. The memory transistor MT has a photoelectric converting region PD in the substrate directly below the floating gate 14. By irradiating the memory transistor MT with light while a positive writing voltage is applied to the control gate 16, charges generated in the photoelectric converting region PD are injected into the floating gate 14 to be held therein, so that pixel information is stored as a threshold voltage. Thus, it is possible to provide a solid-state imaging device with memory function, which has a small unit pixel area, a small electric current consumption and a simple structure and which can be produced without the need of any complicated producing processes.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA72-34 HORIKAWA-CHO SAIWAI-KU KAWASAKI-SHI KANAGAWA 2120013 ?2120013

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nakai, Hiroto Yokohama, JP 68 2617

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