Method for programming nonvolatile memory cells with program and verify algorithm using a staircase voltage with varying step amplitude
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United States of America Patent
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Sep 7, 2004
Grant Date -
Dec 19, 2002
app pub date -
Apr 9, 2002
filing date -
Apr 10, 2001
priority date (Note) -
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Abstract
A method for programming a nonvolatile memory cell envisages applying in succession, to the gate terminal of the memory cell, a first and a second programming pulse trains with pulse amplitude increasing in staircase fashion, in which the amplitude increment between one pulse and the next in the first programming pulse train is greater than the amplitude increment between one pulse and the next in the second programming pulse train. The programming method envisages applying, to the gate terminal of the memory cell and before the first programming pulse train, a third programming pulse train with pulse amplitude increasing in staircase fashion, in which the amplitude increment between one pulse and the next may be less than the amplitude increment in the first programming pulse train and substantially equal to the amplitude increment in the second programming pulse train, or else may be greater than the amplitude increment in the first programming pulse train.
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