Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages
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United States of America Patent
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Sep 14, 2004
Issued Date -
N/A
app pub date -
Jan 9, 2002
filing date -
Aug 17, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A stereolithographically fabricated package that surrounds at least a portion of a semiconductor die so as to substantially hermetically seal the same. The package may be fabricated from thermoplastic glass, other types of glass, ceramics, or metals. Stereolithographic processes are used to fabricate at least a portion of the substantially hermetic package around the semiconductor dice of assemblies including carrier substrates or leads or around bare or minimally packaged semiconductor dice, including on dice that have yet to be singulated from a wafer. As at least a portion of the substantially hermetic package is stereolithographically fabricated, that portion may include a series of superimposed, contiguous, mutually adhered layers of a suitable hermetic material. The layers can be fabricated by consolidated selected regions of a layer of unconsolidated particulate or powdered material, or by defining an object layer from a sheet of material.
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