Clock controlling method and circuit with a multi-phase multiplication clock generating circuit

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United States of America Patent

PATENT NO 6791386
SERIAL NO

10370641

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Abstract

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A clock control circuit comprises a control circuit 102 for outputting a control signal for adding or subtracting a phase to a reference clock, which is an input clock or a clock generated from the input clock, on each clock period of the reference clock, and a phase adjustment circuit 101 fed with the input clock and outputting an output clock having the phase adjusted to the reference clock.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
RENESAS ELECTRONICS CORPORATIONTOKYO11913

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Saeki, Takanori Tokyo, JP 94 1049

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