Clock controlling method and circuit with a multi-phase multiplication clock generating circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6791386
APP PUB NO 20030128059A1
SERIAL NO

10370641

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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A clock control circuit comprises a control circuit 102 for outputting a control signal for adding or subtracting a phase to a reference clock, which is an input clock or a clock generated from the input clock, on each clock period of the reference clock, and a phase adjustment circuit 101 fed with the input clock and outputting an output clock having the phase adjusted to the reference clock.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
RENESAS ELECTRONICS CORPORATIONTOKYO12089

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Saeki, Takanori Tokyo, JP 92 1000

Cited Art Landscape

Patent Info (Count) # Cites Year
 
NEC CORPORATION (1)
* 6014065 Multi-phase modulator having automatic compensators for offsets of orthogonal adjustment 20 1998
 
LUCENT TECHNOLOGIES INC. (1)
* 6259295 Variable phase shifting clock generator 21 1999
 
RENESAS ELECTRONICS CORPORATION (1)
6052004 Method and apparatus for controlling clock signals 17 1998
 
TEXAS INSTRUMENTS INCORPORATED (1)
* 5841707 Apparatus and method for a programmable interval timing generator in a semiconductor memory 72 1996
 
MITSUBISHI DENKI KABUSHIKI KAISHA (1)
5801589 Frequency synthesizer which suppresses a spurious 24 1997
 
KABUSHIKI KAISHA TOSHIBA (1)
* 6259290 Delay locked loop having a mis-lock detecting circuit 26 1999
 
WINBOND ELECTRONICS CORP. (1)
* 6323705 Double cycle lock approach in delay lock loop circuit 54 2000
 
ITT CORPORATION (1)
* 5258724 Frequency synthesizer 36 1983
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
INTEGRATED DEVICE TECHNOLOGY, INC. (1)
7573303 Digitally controlled system on-chip (SOC) clock generator 16 2007
* Cited By Examiner