Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials

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United States of America Patent

PATENT NO 6794705
APP PUB NO 20020084481A1
SERIAL NO

09751551

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Abstract

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A multi-layer electrode (246) and method of fabrication thereof in which a conductive region (244) is separated from a barrier layer (222) by a first conductive liner (240) and a second conductive liner (242). First conductive layer (240) comprises Pt, and second conductive liner (242) comprises a thin layer of conductive oxide. The multi-layer electrode (246) prevents oxygen diffusion through the top conductive region (244) and reduces material variation during electrode patterning.

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Patent Owner(s)

  • POLARIS INNOVATIONS LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lian, Jingyu Wallkill, NY 39 206
Lin, Chenting Poughkeepsie, NY 17 131
Nagel, Nicolas Yokohama, JP 55 563
Wise, Michael Lagrangeville, NY 35 1114

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