High speed asynchronous bus for an integrated circuit
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United States of America Patent
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Sep 21, 2004
Grant Date -
N/A
app pub date -
Jun 4, 2001
filing date -
Jun 4, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An apparatus for providing a high speed asynchronous bus for a plurality of modules of an integrated circuit is disclosed. Each of the modules may comprise one or more clock domains. The apparatus comprises a distributed AND structure capable of receiving a data strobe signal and a data signal from each of the plurality of modules. A method for sampling data from the high speed asynchronous bus is also disclosed. Data is sampled when a sampling criterion has occurred. The sampling criterion is based upon detecting changes in a data strobe signal or in a delayed data strobe signal.
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