Branch ordering buffer
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Sep 28, 2004
Grant Date -
N/A
app pub date -
Jun 30, 2000
filing date -
Jun 30, 2000
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A branch ordering buffer. One disclosed apparatus includes a processor state management circuit to maintain a primary state and a shadow state, each of the primary state and the shadow state including mappings from logical registers to physical registers. The primary state is a speculative state. This disclosed apparatus also includes a branch ordering circuit to prevent the shadow state from advancing beyond a branch instruction until commitment of the branch instruction.
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