Power/ground ring substrate for integrated circuits
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United States of America Patent
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Oct 5, 2004
Grant Date -
Jun 19, 2003
app pub date -
Dec 19, 2001
filing date -
Dec 19, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A substrate (110) for an unpackaged integrated circuit (IC) chip (118). The substrate comprises an insulative material (112), a plurality of contacts (114) disposed thereon, and a conductive ring (150) disposed around the outer perimeter of the contacts (114). Conductive traces (115) may be disposed around one or more contacts (114) and may be coupled to the conductive ring (150). An electro-less plating technique is utilized to plate contacts (114), avoiding unnecessary conductive material such as plating stubs being included in the contact (114) pattern, reducing interference. The conductive ring (150) shields the chip (118) from interference.
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