Semiconductor die package having mesh power and ground planes

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6803650
APP PUB NO 20020117751A1
SERIAL NO

09867438

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A cluster grid array semiconductor die package and mating socket provide electrical connection between one or more semiconductor dies housed within the die package and substrate, such as a printed circuit board, on which the mating socket is mounted. The die package and the mating socket may be easily connected and disconnected. The die package may include power and ground planes built into and distributed within the housing of the die package.

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Patent Owner(s)

Patent OwnerAddress
SILICON BANDWIDTH INC46539 FREMONT BOULEVARD FREMONT CA 94538

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cangellaris, Andreas C Champaign, IL 2 17
Crane, Jr Stanford W Santa Clara, CA 66 1288
Jeon, Myoung-soo Fremont, CA 16 203
Ogata, Charley Takeshi San Jose, CA 4 38
Schutt-Aine, Jose Savoy, IL 6 39
Wang, Ton-Yong Fremont, CA 4 38

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