State machine in a programmable logic device
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United States of America Patent
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Oct 12, 2004
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N/A
app pub date -
Sep 25, 2002
filing date -
Sep 25, 2002
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Abstract
A programmable logic device (PLD) is disclosed that includes a state machine integrated into a block memory. The state machine includes state machine logic and memory elements from the block memory. The state machine logic and memory elements together may be used as an instruction unit of a processor. In such a case, the instruction unit is coupled to a processor execution unit to form a high-performance, embedded processor within a PLD.
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