Addressing of memory matrix

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6804138
APP PUB NO 20020060923A1
SERIAL NO

09899093

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Abstract

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In a method of driving a passive matrix display or memory array of cells comprising an electrically polarizable material exhibiting hysteresis, in particular a ferroelectric material, wherein the polarization state of individual cells can be switched by application of electric potentials or voltages to word and bit lines in the matrix or array, a potential on selected word and bit lines is controlled to approach or coincide with one of n predefined potential levels and the potentials on all word and bit lines are controlled in time according to a protocol such that word lines are sequentially latched to potentials selected among n.sub.WORD potentials, while the bit lines are either latched sequentially to potentials selected among n.sub.BIT potentials, or during a certain period of a timing sequence given by the protocol connected to circuitry for detecting charges flowing between a bit line or bit lines and cells connecting thereto. This timing sequence is provided with a read cycle during which charges flowing between the selected bit line or bit lines connecting thereto are detected and a 'refresh/write cycle' during which the polarization of the cells connecting with selected word and bit lines are brought to correspond with a set of predetermined values.

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Patent Owner(s)

Patent OwnerAddress
THIN FILM ELECTRONICS ASAOSLO CITY OF NORWAY OSLO OSLO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Carlsson, Johan Linkoping, SE 34 377
Gudesen, Hans Gude Brussels, BE 66 1918
Gustafsson, Goran Linkoping, SE 22 372
Nordal, Per-Erik Asker, NO 48 1709
Thompson, Michael O Ithaca, NY 29 1652

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