Content addressable memory match line sensing techniques
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United States of America Patent
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Oct 26, 2004
Issued Date -
N/A
app pub date -
Mar 14, 2003
filing date -
Nov 15, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A content addressable memory (10) comprising a group of content addressable cells (20) and a group of corresponding match switches (30) coupled by a first match line (36) that is switched to a first voltage in the event all of the match switches in the group are in a first state and is switched to a second range of voltages in the event one or more of the match switches in the group are in a second state. Apparatus for detecting the state of the first match line comprises a second line (56), a second transistor (58) coupled to the second line, a third transistor (66) coupled in series with the second transistor and a differential amplifier (70) arranged to detect the difference in voltage between the first match line and the second line.
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