Topographically aligned layers and method for adjusting the relative alignment of layers and apparatus therefor
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United States of America Patent
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Nov 2, 2004
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N/A
app pub date -
Nov 6, 2001
filing date -
Nov 6, 2000
priority date (Note) -
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Abstract
Patterned layers in an integrated circuit (IC) or other device are aligned in conjunction with the detection of the topology of the layers. The topology can be used to determine the location of a metrology mark and/or to compensate for a horizontal shift in the apparent location of the metrology mark. Precise detection of topography can be achieved without physical contact with the IC or other device with an atomic force microscope.
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