Method of compensating for delay between clock signals

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United States of America Patent

PATENT NO 6813723
SERIAL NO

09698223

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Abstract

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Method of compensating for a delay between clock signals for a semiconductor integrated circuit having a plurality of devices synchronous to a plurality of clock signals, including the steps of (1) searching for devices between which a data transmission path is set up synchronous to different clock signals among the plurality of devices, and (2) adding a plurality of delays only to between the devices having the data transmission path set up therebetween for compensating for the delay coming from a difference of clock signals, whereby solving non-uniformity of clock signals by using a small number of delays.

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Patent Owner(s)

  • HYUNDAI ELECTRONICS INDUSTRIES CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Min, Jun Kyu Kyonggi-do, KR 1 0

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