BICMOS semiconductor integrated circuit device and fabrication process thereof
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United States of America Patent
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Nov 9, 2004
Issued Date -
N/A
app pub date -
Sep 10, 2002
filing date -
Nov 7, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.
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