Reduced terminal testing system
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United States of America Patent
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-
Nov 9, 2004
Grant Date -
Jan 2, 2003
app pub date -
Aug 5, 2002
filing date -
Sep 13, 1996
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor wafer having dice that include circuitry that is placed into a mode when the circuitry receives an alternating signal having certain characteristics. The alternating signal may be supplied from a system controller through a probe, probe pad, and conductive path on the wafer.
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