Thin film transistor array substrate and manufacturing method thereof
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 16, 2004
Grant Date -
Oct 23, 2003
app pub date -
Oct 21, 2002
filing date -
Apr 17, 2002
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A thin film transistor array substrate, and its manufacturing method, that is made using a three-round mask process. Gate patterns, each of which includes a gate line consisting of a transparent metal pattern and a gate metal pattern, a gate electrode, a lower gate pad, a lower data pad, and a pixel electrode are formed using a first mask process. A second mask process forms a gate insulating pattern and a semiconductor pattern. A third mask process forms source and drain patterns, each of which includes a data line, a source electrode, a drain electrode, an upper gate pad and an upper data pad. Additionally, the gate metal pattern on an upper portion of the pixel electrode is removed.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully