Apparatus for performing bit sensitive parallel bus peer addressing

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6826178
SERIAL NO

09669102

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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Methods and apparatus used in systems for communicating data (e.g., voice, video and alphanumeric data), including but not limited to telecommunications systems, computer systems, to efficiently utilize bandwidth by performing bit sensitive peer addressing. Apparatus (and related methods) for performing bit sensitive peer addressing include a parallel bus of data bits, a clock bit, a bid/busy bit, and an ack bit. The invention further includes a plurality of port devices coupled to the bus. Each port device includes bus interface circuitry, port control circuitry, and line interface circuitry. The clock signal is used to synchronize messages on the bus and to divide the time domain into timeslots (one timeslot being the reciprocal of the clock frequency). According to the invention, no frame reference is used and traffic on the bus is controlled using a protocol. Each port has an address which is one of the data bits of the bus. Ports bid for access to the bus by asserting their data line and the bid/busy line whenever the bid/busy line is not asserted by another. After seizing the bus, a source port keeps the bid/busy line asserted until it is done transmitting. When two or more ports bid for bus access at the same time, access is given to the port with the highest priority. According to a preferred embodiment of the invention priority is associated with the bit number.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
UNIFY, INC.Not Provided328

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Leonard, Martin E Hollister, CA 2 7

Cited Art Landscape

Patent Info (Count) # Cites Year
 
TRANSWITCH CORPORATION (1)
* 6205155 Apparatus and method for limiting data bursts in ATM switch utilizing shared bus 12 1999
 
UNIFY, INC. (1)
* 6654838 Methods for performing bit sensitive parallel bus peer addressing 5 2000
 
TEXAS INSTRUMENTS INCORPORATED (1)
* 5822550 Split data path fast at-bus on chip circuits systems and methods 21 1997
 
STMICROELECTRONICS LIMITED (1)
* 6389498 Microprocessor having addressable communication port 12 1999
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (2)
8432804 Transmitting video streams 0 2008
* 2009/0141,800 Transmitting Video Streams 6 2008
 
RADISYS CORPORATION (2)
* 7467179 Backplane architecture for a data server 0 2002
* 2004/0003,152 Backplane architecture for a data server 4 2002
* Cited By Examiner