Semiconductor package and method for manufacturing the same
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United States of America Patent
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Dec 14, 2004
Grant Date -
Jan 2, 2003
app pub date -
Jun 4, 2002
filing date -
May 20, 1999
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A semiconductor package and method for manufacturing the same is disclosed. The semiconductor package comprises a semiconductor chip, a circuit board, an electrical connection means, an encapsulation material and a plurality of conductive balls. The semiconductor chip has a first surface and a second surface. A plurality of input and output pads are formed on one of the first and second surfaces. The circuit board comprises a thin film having a first surface and a second surface and being provided with a center hole in which the semiconductor chip is positioned, a plurality of circuit patterns being formed on the first surface of the thin film and including a plurality of bond fingers and ball lands, and a cover coat covering the circuit board except for the bond fingers and the ball lands. The electric connection means electrically connects the input and output pads of the semiconductor chip with the bond fingers of the circuit board. The encapsulation material covers the semiconductor, the electric connection means and a portion of the circuit board. The conductive balls are fusion-welded on the ball lands of the circuit board.
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