Method of fabricating flip chip semiconductor device utilizing polymer layer for reducing thermal expansion coefficient differential
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United States of America Patent
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Dec 14, 2004
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N/A
app pub date -
Jun 17, 2002
filing date -
Sep 12, 1997
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Abstract
An improved flip chip assembly is disclosed of the type where a semiconductor chip having a certain thermal expansion coefficient is directly mounted via solder bumps on the metallization pattern of a circuit substrate having a different thermal expansion coefficient. A base layer comprised of a polymer material is disposed over the surface of the chip, between the chip and the substrate, and the solder bumps are placed over the base layer; the base layer modifies the effective thermal expansion coefficient of the solder bumps to approximate that of the substrate, thus reducing the thermal expansion coefficient differential at the junction of the chip and the substrate.
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