Cryptographic accelerator
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United States of America Patent
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Dec 14, 2004
Issued Date -
N/A
app pub date -
Aug 14, 2001
filing date -
Aug 26, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A cryptographic accelerator for handling instruction-intensive bit permutations. The cryptographic accelerator comprises a selector and a plurality of buses coupled to the selector. Herein, at least one of the plurality of buses includes signal lines routed to perform a bit permutation operation incoming data. The bit permutation operation is one of a plurality of operations associated with a symmetric key function.
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