Computer architecture for and method of high-resolution imaging using a low-resolution image transducer

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United States of America Patent

PATENT NO 6833908
APP PUB NO 20020171816A1
SERIAL NO

09816800

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Abstract

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Architecture and method to transfer data in generation, display or printing high edge placement accuracy images from multiple exposure of plurality of predefined patterns with lower edge placement accuracy. A pattern is laid out on a grid finer or different from grid size of image transducer pixel size, overlaid by transducer grid and converted to n patterns compatible with transducer grid. When combined by partial exposures weighting patterns unevenly, the n patterns generate an image with line edge positions a fraction (1/(2.sup.n -1)) of transducer grid size. For most picture display and step-and-repeat lithography applications, pattern stored in first memory is displayed or partially exposed once, and remaining patterns are displayed or partially exposed 2.sup.m-1 times m being copy number of the pattern. Superimposing 2.sup.n -1 exposures in human eye to scene integration time, picture with improved line placement accuracy is perceived.

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Patent Owner(s)

Patent OwnerAddress
ULTRATECH INC3050 ZANKER ROAD SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Markle, David A Saratoga, CA 73 2112

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