Non-volatile semiconductor memory with single layer gate structure
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United States of America Patent
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Jan 4, 2005
Grant Date -
Mar 13, 2003
app pub date -
Oct 15, 2002
filing date -
Apr 28, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film. This invention can realize a reliable semiconductor device which is a single-layer gate semiconductor device by which a low-cost process is possible, has a control gate which can well withstand a high voltage applied when data is erased or written, and can prevent an operation error by minimizing variations in the threshold value.
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