Stacked structure for parallel capacitors and method of fabrication

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United States of America Patent

PATENT NO 6838717
SERIAL NO

09653295

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A monolithic integrated circuit including a capacitor structure. In one embodiment the integrated circuit includes at least first and second levels of interconnect conductor for connection to a semiconductor layer and a stack of alternating conductive and insulative layers formed in vertical alignment with respect to an underlying plane. The stack is formed between the first and second levels of conductor. Preferably the stack includes a first conductive layer, a first insulator layer formed over the first conductive layer, a second conductive layer formed over the first insulative layer, a second insulator layer formed over the second conductive layer, and a third conductive layer formed over the second insulative layer, with the first and third conductive layers commonly connected.

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Patent Owner(s)

  • AGERE SYSTEMS INC.;BELL SEMICONDUCTOR, LLC;LUCENT TECHNOLOGIES INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hui, Frank Yauchee Orlando, FL 5 116
Yan, Yifeng Winston Orlando, FL 5 68
Yen, Allen Orlando, FL 13 253

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