Memory module with offset data lines and bit line swizzle configuration
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United States of America Patent
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Jan 4, 2005
Issued Date -
N/A
app pub date -
Mar 20, 2002
filing date -
Sep 14, 1999
priority date (Note) -
Expired
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Abstract
A memory module includes an array of N memory devices, each memory device having M data pins, where N is greater than M, and M and N are positive integers; and N bit lines traversing the array of N memory devices, such that each one of the N bit lines is connected to M of the N memory devices.
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