Read and erase verify methods and circuits suitable for low voltage non-volatile memories
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United States of America Patent
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Jan 4, 2005
Grant Date -
Oct 14, 2004
app pub date -
Apr 14, 2003
filing date -
Apr 14, 2003
priority date (Note) -
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Abstract
In a non-volatile memory, the read parameter used to distinguish the data states characterized by a negative threshold voltage from the data states characterized by a positive threshold voltage is compensated for the memory's operating conditions, rather than being hardwired to ground. In an exemplary embodiment, the read parameter for the data state with the lowest threshold value above ground is temperature compensated to reflect the shifts of the storage element populations on either side of the read parameter. According to another aspect, an erase process is presented that can take advantage the operating condition compensated sensing parameter. As the sensing parameter is no longer fixed at a value corresponding to 0 volts, instead shifling according to operating conditions, a sufficient margin is provided for the various erase verify levels even at lowered operating voltages.
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