Error-correcting code interleaver

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United States of America Patent

PATENT NO 6839870
APP PUB NO 20040187063A1
SERIAL NO

10394937

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Abstract

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Memory may be partitioned into ever-sliding FIFOs. Each of the FIFOs may be stacked end-to-end in memory with the oldest data at the base offset and the newest at the end (or vice-virsa). Each symbol, the pointer may be incremented (modulo the set size) by an appropriate amount (typically J more than for the previous symbol). After each set, the pointers may be incremented by J more than the previous increment and the process starts over, wrapping around the memory if the end of the memory is reached. After a preset number of symbols, the process may restart from an increment of J. Alternatively, the pointers may be decremented rather than incremented. Thus, the newest symbol cannibalizes the memory position vacated by the oldest symbol in the current FIFO, causing the FIFOs to 'slide', providing for a very efficient and reliable use of memory for error-correcting code interleaving.

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Patent Owner(s)

Patent OwnerAddress
ARRIS ENTERPRISES LLC101 TOURNAMENT DRIVE BUILDING 4 HORSHAM PA 19044

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fanfelle, Robert J Redwood City, CA 2 41
Hubris, Alexander San Jose, CA 16 236

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