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Abstract

A switch is presented including a host input/output (I/O) port adapted for coupling to a controller, multiple device I/O ports each adapted for coupling to at least one device, and logic coupled between the host I/O port and the device I/O ports configured to selectively form a communication channel between the host I/O port and one of the device I/O ports. The switch may operate in a connected mode and a disconnected mode. When in the switch is in the disconnected mode, the logic may not form a communication channel between the host I/O port and any of the device I/O ports. In an ATA embodiment, the switch may comply with an AT attachment (ATA) standard, and thus be an ATA switch. The host I/O port may be adapted for coupling to an ATA controller, the device I/O ports may be adapted for coupling to at least one ATA device, and the logic may selectively form an ATA communication channel between the host I/O port and one of the device I/O ports. Several methods for exchanging data between a processing unit coupled to the host I/O port of the switch and one or more devices coupled to device I/O ports of the switch are described. Several methods for performing direct memory access (DMA) transfers to move data between a memory of the processing unit and one or more of the devices are also described.

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First Claim