Semiconductor package and method for manufacturing the same

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United States of America Patent

PATENT NO 6846704
SERIAL NO

10680280

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Abstract

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A semiconductor package is provided which includes a semiconductor die having opposed, generally planar first and second surfaces and a peripheral edge. Formed on the second surface of the semiconductor die in close proximity to the peripheral edge thereof is a plurality of bond pads. The semiconductor package further includes a plurality of leads which are positioned about the peripheral edge of the semiconductor die in space relation to the second surface thereof. Each of the leads includes opposed, generally planar first and second surfaces, and a generally planar third surface which is oriented between the first and second surfaces in opposed relation to a portion of the second surface. In the semiconductor package, a plurality of conductive bumps are used to electrically and mechanically connect the bond pads of the semiconductor die to the third surfaces of the respective ones of the leads. An encapsulating portion is applied to and partially encapsulates the leads, the semiconductor die, and the conductive bumps.

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Patent Owner(s)

Patent OwnerAddress
AMKOR TECHNOLOGY SINGAPORE HOLDING PTE LTDVALLEY POINT #12-03

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Paek, Jong Sik Kwangju-shi, KR 103 1522

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