Method and process to make multiple-threshold metal gates CMOS technology
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United States of America Patent
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Jan 25, 2005
Grant Date -
May 20, 2004
app pub date -
Nov 20, 2002
filing date -
Nov 20, 2002
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Abstract
Methods of forming complementary metal oxide semiconductor (CMOS) devices having multiple-threshold voltages which are easily tunable are provided. Total salicidation with a metal bilayer (representative of the first method of the present invention) or metal alloy (representative of the second method of the present invention) is provided. CMOS devices having multiple-threshold voltages provided by the present methods are also described.
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