Reducing variation in randomized nanoscale circuit connections
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 8, 2005
Grant Date -
Feb 12, 2004
app pub date -
Aug 12, 2002
filing date -
Aug 12, 2002
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method and apparatus of reducing variations in nanoscale circuit connections. One exemplary embodiment includes: placing a first connector between a first addressing wire and a first nanowire in a partial circuit; and applying bias to the partial circuit so that a second connector is placed between a second addressing wire and a second nanowire. This method of bias connections is repeated for each wire in the full circuit. Thus, bias is used to influence the positioning of connectors on additional wires (if any) in the full circuit.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully