CMOS buffer with reduced ground bounce
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United States of America Patent
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Feb 15, 2005
Grant Date -
Jun 10, 2004
app pub date -
Sep 12, 2003
filing date -
Jul 27, 2001
priority date (Note) -
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Abstract
A CMOS output buffer uses feedback from a ground node to reduce ground bounce by utilizing a tolerable ground bounce limit, making it less sensitive to operating conditions and processing parameters. An input to the NMOS device of the output buffer is provided by the output of a control element which receives a first input from a pre-driver and a second input (i.e., the feedback) from the ground node.
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